1. Field of the Invention
Embodiments of the invention relate generally to the field of memory devices and, more particularly, to techniques for detecting programming failures in flash memory devices.
2. Description of the Related Art
In recent years, NAND flash memory has become an increasingly popular form of non-volatile storage utilized by various embedded systems and electronic devices, such as portable digital media players, memory cards, USB flash drives, and cellular telephones, to name a few. The increased demand may be attributed, at least partially, to the higher memory densities that NAND flash memory devices typically offer relative to other types of non-volatile memories, such as NOR flash memory. Additionally, NAND flash memory may generally be produced at a lower cost relative to NOR flash memory due, for instance, to the lower number of metal contacts utilized in constructing a NAND flash memory array. Thus, as the demand for lower-power, lighter, and more robust memory-based products continues to increase, NAND flash memory continues to provide an attractive solution for a wide range of applications.
Despite the above-mentioned advantages, NAND flash memory has some drawbacks. For instance, NAND flash memory devices may sometimes include bad blocks due, for example, to defects that may have occurred during the manufacturing process, and may require error correction to maintain data integrity. Additionally, flash memory devices may be susceptible to programming failures that may occur during operation. As will be understood, the failure to successfully program a memory device will result in some memory cells failing to reach their expected programmed state. By way of example, such programming failures may occur as a result of a power interruption during a programming operation.
To counter this particular type of programming failure, many flash memory devices utilize a flash management algorithm for detecting and ignoring memory pages that were unsuccessfully programmed when power is eventually restored to the NAND flash memory device. Conventional flash management algorithms have typically been configured to detect unsuccessfully programmed pages by performing a program operation to a management area for each logical block of data written to a data area of a page within a flash memory array. For example, the program operation performed by the flash management algorithm may include storing some type of indicator (e.g., setting a bit, semaphore, etc.) in the management area that indicates the validity of each logical block in the data area of the programmed page.
Thus, while conventional flash memory algorithms are capable of detecting flash programming failures, two separate programming operations are generally utilized in order to do so. Specifically, a first write operation is used to write a data pattern to a page of the flash memory array, and a second write operation is used to store the indication (e.g., in the management area) as to whether or not the page was successfully programmed. As will be understood, the two programming operations utilized to indicate the validity of data in a memory page may undesirably increase the total time required to program a memory array.
Accordingly, embodiments of the present invention may be directed to one or more of the problems set forth above.